[C29] A Charge-Domain Computation-in-Memory Macro with Versatile All-Around-Wire-Capacitor for Variable-Precision Computation and Array-Embedded DA/AD Conversions


A charge-domain SRAM-based CIM macro is proposed to implement efficient neural accelerator with variable input/weight/output precisions. A versatile All-Around-Wire-Capacitor (AAWC) is introduced to enable accurate charge-domain MAV operation with 1-5 bit variable-precision weight capability with 10T SRAM cell structure. The AAWC also allows variable-precision array-embedded 1-5 bit digital-to-analog (DA) conversion for input, and 1-6 bit analog-to-digital (AD) conversion for output without additional passive devices. Such array-embedded DA/AD conversion scheme significantly reduces area overhead and simplifies peripheral circuits to achieve high array efficiency while achieving high energy efficiency of 24–330 TOPS/W.

IEEE European Solid-State Circuit Conference (ESSCIRC) 2021
Johnny Rhe (이존이)
Johnny Rhe (이존이)
Combined MS-PhD student