Latest

• [J31] An FPGA-Based Energy-Efficient Real-Time Hand Pose Estimation System with an Integrated Image Signal Processor for Indirect 3D Time-of-Flight Sensors
• [C67] F-3DGS: Factorized Coordinates and Representations for 3D Gaussian Splatting
• [C66] HandDAGT: A Denoising Adaptive Graph Transformer for 3D Hand Pose Estimation
• [C65] Continuous Memory Representation for Anomaly Detection
• [J30] Reconfigurable Resistive Switching Memory for Telegraph Code Sensing and Recognizing Reservoir Computing Systems
• [C64] C-AFA: A Conditionally Approximate Full Adder for Efficient DNN Inference in CIM Arrays
• [C63] A Hybrid Precision Network with Efficient Processing Elements for 3D Hand Pose Estimation
• [C62] Row-Efficient Pruning for In-Memory Convolutional Weight Mapping
• [J29] One-Shot Remote Integration of Macromolecular Synaptic Elements on a Chip for Ultrathin Flexible Neural Network System
• [C61] HandDiff: 3D Hand Pose Estimation with Diffusion on Image-Point Cloud
• [C60] Compact 3D Gaussian Representation for Radiance Field
• [C59] ConvMapSim: Modeling and Simulating Convolutional Weight Mapping for PIM Arrays
• [C58] An Efficient Ventricular Arrhythmias Detection on Microcontrollers with Optimized 1D CNN
• [C57] Adaptive Image Downscaling for Rate-Accuracy-Latency Optimization of Task-Target Image Compression
• [C56] TraiNDSim: A Simulation Framework for Comprehensive Performance Evaluation of Neuromorphic Devices for On-Chip Training
• [J28] KERNTROL: Kernel Shape Control Toward Ultimate Memory Utilization for In-Memory Convolutional Weight Mapping
• [C55]KARS: Kernel-Grouping Aided Row-Skipping for SDK-based Weight Compression in PIM Arrays
• [C54]Coordinate-Aware Modulation for Neural Fields
• [J27] A DNN Partitioning Framework with Controlled Lossy Mechanisms for Edge-Cloud Collaborative Intelligence
• [J26] Highly Reliable 3D Channel Memory and Its Application in a Neuromorphic Sensory System for Finger Motion Tracking
• [C53]Facto-CNN: Memory-Efficient CNN Training with Low-rank Tensor Factorization and Lossy Tensor Compression
• [C52] Mip-Grid: Anti-aliased Grid Representations for Neural Radiance Fields
• [C51] DCR: Decomposition-Aware Column Re-Mapping for Stuck-At-Fault Tolerance in ReRAM Arrays
• [C50] FFNeRV: Flow-Guided Frame-Wise Neural Representations for Videos
• [C49] Multi-Scale Bidirectional Recurrent Network with Hybrid Correlation for Point Cloud Based Scene Flow Estimation
• [C48] HandR2N2: Iterative 3D Hand Pose Estimation Using a Residual Recurrent Neural Network
• [C47] Kernel Shape Control for Row-Efficient Convolution on Processing-In-Memory Arrays
• [C46] An Energy Efficient Sorting Architecture with Cell-Gating for Top-K Sorting on FPGA
• [C45] PAIRS: Pruning-AIded Row-Skipping for Convolutional Weight Mapping in Processing-In-Memory Architectures
• [C44] Weight-Aware Activation Mapping for Energy-Efficient Convolution on PIM Arrays
• [C43] Dynamic Inference Acceleration of 3D Point Cloud Deep Neural Networks Using Point Density and Entropy
• [C42] Rate-Controllable and Target-Dependent JPEG-Based Image Compression Using Feature Modulation
• [C41] Masked Wavelet Representation for Compact Neural Radiance Fields
• [C40] Regression to Classification: Waveform Encoding for Neural Field-Based Audio Signal Representation
• [J25] Data-Driven Design of Electrically Conductive Nanocomposite Materials: A Case Study of Acrylonitrile–Butadiene–Styrene/Carbon Nanotube Binary Composites
• [J24] Room-Temperature-Processable Highly Reliable Resistive Switching Memory with Reconfigurability for Neuromorphic Computing and Ultrasonic Tissue Classification
• [J23] An Overhead-Free Region-Based JPEG Framework for Task-Driven Image Compression
• [C39] Element-wise Partial Product Quantization for Efficient Deep Learning Accelerators
• [C38] An Efficient Systolic Array with Variable Data Precision and Dimension Support
• [C37] Neural Residual Flow Fields for Efficient Video Representations
• [J22] Micro-ultrasonic Assessment of Early Stage Clot Formation and Whole Blood Coagulation Using an All-Optical Ultrasound Transducer and an Adaptive Signal Processing Algorithm
• [J21] A Reconfigurable Neural Architecture for Edge–Cloud Collaborative Real-Time Object Detection
• [C36] Bi-PointFlowNet: Bidirectional Learning for Point Cloud Based Scene Flow Estimation
• [C35] Streamable Neural Fields
• [J20] Scalable Color Quantization for Task-Centric Image Compression
• [J19] Epidermal Piezoresistive Structure with Deep Learning-Assisted Data Translation
• [C34] NAS-VAD: Neural Architecture Search for Voice Activity Detection
• [J18] Multi-Prediction Compression: An Efficient and Scalable Memory Compression Framework for GP-GPU
• [J17] VWC-SDK: Convolutional Weight Mapping Using Shifted and Duplicated Kernel with Variable Windows and Channels
• [C33] ADA-VAD: Unpaired Adversarial Domain Adaptation for Noise-Robust Voice Activity Detection
• [C32] VW-SDK: Efficient Convolutional Weight Mapping Using Variable Windows for Processing-In-Memory Architectures
• [J16] ORVAE: One-Class Residual Variational Autoencoder for Voice Activity Detection in Noisy Environment
• [J15] Adaptive Weight-bit Inversion for State Error Reduction for Robust and Efficient Deep Neural Network Inference Using MLC NAND Flash
• [C31] HandFoldingNet: A 3D Hand Pose Estimation Network Using Multiscale-Feature Guided Folding of a 2D Hand Skeleton
• [J14] Binary-Classifiers-Enabled Filters for Semi-Supervised Learning
• [C30] A Splittable DNN-Based Object Detector for Edge-Cloud Collaborative Real-Time Video Inference
• [C29] A Charge-Domain Computation-in-Memory Macro with Versatile All-Around-Wire-Capacitor for Variable-Precision Computation and Array-Embedded DA/AD Conversions
• [J13] Target-Dependent Scalable Image Compression Using a Reconfigurable Recurrent Neural Network
• [C28] A Sub-Milliwatt and Sub-Millisecond 3-D GazeEstimator for Ultra Low-Power AR Applications
• [B01] Ultra-low Power/IoT Architectures
• [J12] Robust Detection of Small and Dense Objects in Images from Autonomous Aerial Vehicles
• [J11] A Charge-Domain Scalable-Weight In-Memory Computing Macro with Dual-SRAM Architecture for Precision-Scalable DNN Accelerators
• [C27] Application of Adversarial Domain Adaptation to Voice Activity Detection
• [J10] Segmentation of Points in the Future: Joint Segmentation and Prediction of a Point Cloud
• [C26] WISER: Deep Neural Network Weight-bit Inversion for State Error Reduction in MLC NAND Flash
• [C25] VisDrone-DET2020: The Vision Meets Drone Object Detection in Image Challenge Results
• [J8] CAMEL: An Adaptive Camera with Embedded Machine Learning Based Sensor Parameter Control
• [C24] A Camera with Brain–Embedding Machine Learning in 3D Sensors
• [C23] Mixture of Pre-processing Experts Model for Noise Robust Deep Learning on Resource Constrained Platforms
• [C22] Edge-Host Partitioning of Deep Neural Networks with Feature Space Encoding for Resource-Constrained Internet-of-Things Platforms
• [C21] An Energy Harvesting Image Sensor SOC with 5.8μW/mm2 Power Generation and 0.77 frames/second Self-Powered Frame Rate
• [J7] Energy Efficient and Side-Channel Secure Cryptographic Hardware for IoT-edge Nodes
• [C20] Edge-cloud collaborative processing for intelligent internet of things: a case study on smart surveillance
• [J6] 3-D Stacked Image Sensor With Deep Neural Network Computation
• [J5] An Energy-Quality Scalable Wireless Image Sensor Node for Object-Based Video Surveillance
• [C19] Cascade Adversarial Machine Learning Regularized with a Unified Embedding
• [C18] An Unsupervised Anomalous Event Detection Framework with Class Aware Source Separation
• [C17] Precision Scaling of Neural Networks for Efficient Voice Activity Detection
• [C16] A Unified Embedding for Image Classification and Pixel-Level Regularization
• [C15] The CAMEL approach to stacked sensor smart cameras
• [J4] Design and Analysis of a Neural Network Inference Engine based on Adaptive Weight Compression
• [C14] Precision Scaling of Neural Networks for Efficient Audio Processing
• [C13] Cascade Adversarial Machine Learning Regularized with a Unified Embedding
• [C12] Energy-Efficient Neural Image Processing for Internet-of-Things Edge Devices
• [C11] Design of an Energy-Efficient Accelerator for Training of Convolutional Neural Networks using Frequency-Domain Computation
• [J3] A Single-Chip Image Sensor Node With Energy Harvesting From a CMOS Pixel Array
• [J2] Clock Data Compensation Aware Digital Circuits Design for Voltage Margin Reduction
• [C10] On-Chip Training of Recurrent Neural Networks with Limited Numerical Precision
• [C9] Adaptive Weight Compression for Memory-Efficient Neural Networks
• [C8] Clock Data Compensation Aware Clock Tree Synthesis in Digital Circuits with Adaptive Clock Generation
• [C7] A Low-Power Wireless Image Sensor Node with Noise-Robust Moving Object Detection and a Region-of-Interest Based Rate Controller
• [C6] Reconfigurable 96x128 Active Pixel Sensor with 2.1μW/mm2 Power Generation and Regulated Multi- Domain Power Delivery for Self-Powered Imaging
• [C5] An Energy-Efficient Wireless Video Sensor Node with a Region-of-Interest Based Multi-Parameter Rate Controller for Moving Object Surveillance
• [C4] An Energy-Aware Approach to Noise-Tolerant Moving Object Detection for Low-Power Wireless Image Sensor Platforms
• [C3] A Self-powered Wireless Video Sensor Node for Moving Object Surveillance
• [J1] An Energy-Efficient Wireless Video Sensor Node for Moving Object Surveillance
• [C2] Exploring Power Attack Protection of Resource Constrained Encryption Engines using Integrated Low-Drop-Out Regulators
• [C1] Adaptive Wireless Video Sensor Node Using Content-Aware Pre-Processing for Moving Target Identification